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SN74AUC1G86DCKR
SN74AUC1G86 SINGLE 2-INPUT EXCLUSIVE-OR GATE www.ti.com SCES389H – MARCH 2002 – REVISED JUNE 2006 FEATURES • • • • • • • • Available in the Texas Instruments NanoStar™ and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation Ioff Supports Partial Power-Down-Mode Operation Sub-1-V Operable Max tpd of 2.5 ns at 1.8 V Low Power Consumption, 10-µA Max ICC DBV PACKAGE (TOP VIEW) A 1 5 • A VCC 1 3 4 3 5 VCC GND 3 4 B 4 1 5 Y 2 A 2 GND 2 GND YEA OR YZA PACKAGE (BOTTOM VIEW) DCK PACKAGE (TOP VIEW) B B ±8-mA Output Drive at 1.8 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) VCC Y Y See mechanical drawings for dimensions. DESCRIPTION/ORDERING INFORMATION This single 2-input exclusive-OR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC1G86 performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic. A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE (1) NanoStar™ WCSP (DSBGA) – YEA ORDERABLE PART NUMBER TOP-SIDE MARKING (2) (2) NanoFree™ Reel of 3000 WCSP (DSBGA) – YZA (Pb-free) SN74AUC1G86YZAR Reel of 3000 SN74AUC1G86DBVR U86_ SOT (SC-70) – DCK (1) SN74AUC1G86YEAR SOT (SOT-23) – DBV –40°C to 85°C Reel of 3000 Reel of 3000 SN74AUC1G86DCKR UH_ _ _ _UH_ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar, NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2006, Texas Instruments Incorporated
TI
Texas Instruments Incorporated
U.S.A
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