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IS62WV5128BLL-55TLI
IS62WV5128ALL IS62WV5128BLL ® 512K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES 36 mW (typical) operating 9 µW (typical) CMOS standby • TTL compatible interface levels When CS1 is HIGH (deselected) the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. • Single power supply 1.65V – 2.2V Vdd (IS62WV5128ALL) speed, 4M bit static RAMs organized as 512K words by 8 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields highperformance and low power consumption devices. • CMOS low power operation NOVEMBER 2016 DESCRIPTION The ISSI IS62WV5128ALL / IS62WV5128BLL are high- • High-speed access time: 55ns, 70ns Long-term Support World Class Quality 2.5V – 3.6V Vdd (IS62WV5128BLL) • Fully static operation: no clock or refresh required • Three state outputs • Industrial temperature available Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62WV5128ALL and IS62WV5128BLL are packaged in the JEDEC standard 32-pin TSOP (TYPE I), 32-pin sTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin SOP and 36-pin mini BGA. • Lead-free available FUNCTIONAL BLOCK DIAGRAM A0-A18 DECODER 512K x 8 MEMORY ARRAY VDD GND I/O DATA CIRCUIT I/O0-I/O7 CS1 OE COLUMN I/O CONTROL CIRCUIT WE Copyright © 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com 1 Rev. E1 11/1/2016
ISSI
Integrated Silicon Solution Inc
U.S.A
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