HOME＞在庫検索＞在庫情報
THC63LVD823
THC63LVD823B_Rev.3.1_E THC63LVD823B 160MHz 51Bits LVDS Transmitter General Description Features The THC63LVD823B transmitter is designed to support Single Link transmission between Host and Flat Panel Display and Dual Link transmission between Host and Flat Panel Display up to 1080p/QXGA resolutions. The THC63LVD823B converts 51bits of CMOS/TTL data into LVDS (Low Voltage Differential Signaling) data stream. The transmitter can be programmed for rising edge or falling edge clocks through a dedicated pin. In Dual Link, the transmit clock frequency of 160MHz, 51bits of RGB data are transmitted at an effective rate of 1.12Gbps per LVDS channel. • Wide dot clock range suited for TV Signal (480p1080p), PC Signal (VGA-QXGA) TTL/CMOS Input: 10-160MHz LVDS Output: 20-160MHz • PLL requires No external components • Flexible Input/Output mode 1. Single/Dual TTL IN, Single/Dual LVDS OUT 2. Double edge input for Single TTL IN/Dual LVDS OUT • • • • • • • Clock edge selectable 2 LVDS data mapping for simplifying PCB layout. Pseudo Random pattern generation circuit Supports Reduced swing LVDS for Low EMI Power down mode Low power single 3.3V CMOS design 1.2 up to 3.3V tolerant data inputs to connect directly to low power,low voltage application and graphic processor. • Backward compatible with THC63LVD823/ • THC63LVD823A 100pin TQFP HSYNC VSYNC DE 24 3 R/F RS 28 MAP PARALLEL TO SERIAL R2[7:0] G2[7:0] B2[7:0] 28 24 Data Formatter DATA Port2 R1[7:0] G1[7:0] B1[7:0] 1) DEMUX 2) MUX DATA Port1 TA1 +/- PARALLEL TO SERIAL Block Diagram TA2 +/- TB1 +/- LVDS OUTPUT Port1 TC1 +/TD1 +/- TB2 +/- LVDS OUTPUT Port2 TC2 +/TD2 +/- MODE[1:0] O/E DDRN /PDWN PRBS TCLK1 +/- TRANSMITTER CLOCK IN (10 to 160MHz) PLL TCLK2 +/- (N/C) (20 to 160MHz) Copyright©2011 THine Electronics, Inc. 1/21 THine Electronics, Inc.
宅配業者の代金引換又は商品到着後一週間以内の銀行振込となります。
